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RISC-V (+ multiarch in general) #2

Merged
merged 31 commits into from
Mar 10, 2021
Merged

RISC-V (+ multiarch in general) #2

merged 31 commits into from
Mar 10, 2021

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kivikakk
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@kivikakk kivikakk commented Mar 2, 2021

  • Add ARCH to Makefile, should be either arm64 or riscv64.
    • Parameterise just about everything on this. make ARCH=arm64 qemu and make ARCH=riscv64 qemu each build the correct dainboot/dainkrnl, copy it into target/disk and launch QEMU appropriately.
    • Right now dainboots can live side-by-side (because they're named BOOTAA64.efi and BOOTRISCV64.efi), but the dainkrnls overwrite each other.
      • Fix that.
    • CI compiles and attempts the expect(1)-based E2E test on both.
  • Compile in a custom PE header crt0-efi-riscv64.S and ELF loader and self-relocator.
    • This is per Linux, Haiku, U-Boot, etc. What a hack. This took so much work.
      • Working out we had to export our own memcpy and memset to avoid creating a PLT/GOT was big.
  • Add our own Arch enum which uses the names arm64 and riscv64, and conditionally compile in things based on that.
  • Look for uart@ in the DTB for serial base, in addition to pl011@ and serial@.
    • This gets the QEMU riscv64 virt uart.
  • riscv64 bootloader just does fence.i after loading and then jumps to the kernel. No magic.
    • Presumably some magic will be needed when this comes up on hardware. We're using U-Boot in smode on OpenSBI in QEMU.
  • Parameterise kernel start:
    • arm64: 0xffffff80_00000000
    • riscv64: 0x00000040_00000000
      • Needed to set the code model to medium explicitly to get this working.
  • dainkrnl mostly unported.
    • No MMU bring-up yet, but we're starting.

@kivikakk kivikakk marked this pull request as ready for review March 10, 2021 06:12
@kivikakk
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Not done, but I'd like the progress to be visible on master. There's CI changes and arm64 stuff in here too now.

@kivikakk kivikakk merged commit 13c6bae into master Mar 10, 2021
@kivikakk kivikakk deleted the riscv branch March 10, 2021 06:12
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