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"add DGXH100 platform option" #1444

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"add DGXH100 platform option" #1444

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ac9133c
"add DGXH100 platform option"
bartz-nvidia Jan 16, 2025
da3e7a3
update entire config file to include DGXH100, not just platform options
bartz-nvidia Jan 16, 2025
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104 changes: 103 additions & 1 deletion PyTorch/Classification/ConvNets/configs.yml
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Original file line number Diff line number Diff line change
Expand Up @@ -30,7 +30,10 @@ platform:
workers: 10
prefetch: 4
gpu_affinity: socket_unique_contiguous

DGXH100:
workers: 10
prefetch: 4
gpu_affinity: socket_unique_contiguous
mode:
benchmark_training: &benchmark_training
print_freq: 1
Expand Down Expand Up @@ -168,6 +171,25 @@ models:
FP32:
<<: *resnet_params_2k
batch_size: 128
DGXH100:
AMP:
<<: *resnet_params_2k
arch: resnet50
batch_size: 256
memory_format: nhwc
TF32:
<<: *resnet_params_2k
arch: resnet50
batch_size: 256
T4:
AMP:
<<: *resnet_params_2k
arch: resnet50
batch_size: 256
memory_format: nhwc
FP32:
<<: *resnet_params_2k
batch_size: 128
# }}}
resnext101-32x4d: # {{{
DGX1V: &RNXT_DGX1V
Expand Down Expand Up @@ -204,6 +226,16 @@ models:
<<: *resnet_params_1k
arch: resnext101-32x4d
batch_size: 64
DGXH100:
AMP:
<<: *resnet_params_1k
arch: resnext101-32x4d
batch_size: 128
memory_format: nhwc
TF32:
<<: *resnet_params_1k
arch: resnext101-32x4d
batch_size: 128
# }}}
se-resnext101-32x4d: # {{{
DGX1V: &SERNXT_DGX1V
Expand All @@ -230,6 +262,16 @@ models:
<<: *resnet_params_1k
arch: se-resnext101-32x4d
batch_size: 128
DGXH100:
AMP:
<<: *resnet_params_1k
arch: se-resnext101-32x4d
batch_size: 128
memory_format: nhwc
TF32:
<<: *resnet_params_1k
arch: se-resnext101-32x4d
batch_size: 128
T4:
AMP:
<<: *resnet_params_1k
Expand Down Expand Up @@ -282,6 +324,16 @@ models:
<<: *efficientnet_b0_params_4k
arch: efficientnet-widese-b0
batch_size: 256
DGXH100:
AMP:
<<: *efficientnet_b0_params_4k
arch: efficientnet-widese-b0
batch_size: 256
memory_format: nhwc
TF32:
<<: *efficientnet_b0_params_4k
arch: efficientnet-widese-b0
batch_size: 256
# }}}
efficientnet-b0: # {{{
T4:
Expand Down Expand Up @@ -324,6 +376,16 @@ models:
<<: *efficientnet_b0_params_4k
arch: efficientnet-b0
batch_size: 256
DGXH100:
AMP:
<<: *efficientnet_b0_params_4k
arch: efficientnet-b0
batch_size: 256
memory_format: nhwc
TF32:
<<: *efficientnet_b0_params_4k
arch: efficientnet-b0
batch_size: 256
# }}}
efficientnet-quant-b0: # {{{
T4:
Expand Down Expand Up @@ -366,6 +428,16 @@ models:
<<: *efficientnet_b0_params_4k
arch: efficientnet-quant-b0
batch_size: 256
DGXH100:
AMP:
<<: *efficientnet_b0_params_4k
arch: efficientnet-quant-b0
batch_size: 256
memory_format: nhwc
TF32:
<<: *efficientnet_b0_params_4k
arch: efficientnet-quant-b0
batch_size: 256
# }}}
efficientnet-widese-b4: # {{{
T4:
Expand Down Expand Up @@ -408,6 +480,16 @@ models:
<<: *efficientnet_b4_params_4k
arch: efficientnet-widese-b4
batch_size: 64
DGXH100:
AMP:
<<: *efficientnet_b4_params_4k
arch: efficientnet-widese-b4
batch_size: 128
memory_format: nhwc
TF32:
<<: *efficientnet_b4_params_4k
arch: efficientnet-widese-b4
batch_size: 64
# }}}
efficientnet-b4: # {{{
T4:
Expand Down Expand Up @@ -450,6 +532,16 @@ models:
<<: *efficientnet_b4_params_4k
arch: efficientnet-b4
batch_size: 64
DGXH100:
AMP:
<<: *efficientnet_b4_params_4k
arch: efficientnet-b4
batch_size: 128
memory_format: nhwc
TF32:
<<: *efficientnet_b4_params_4k
arch: efficientnet-b4
batch_size: 64
# }}}
efficientnet-quant-b4: # {{{
T4:
Expand Down Expand Up @@ -492,4 +584,14 @@ models:
<<: *efficientnet_b4_params_4k
arch: efficientnet-quant-b4
batch_size: 64
DGXH100:
AMP:
<<: *efficientnet_b4_params_4k
arch: efficientnet-quant-b4
batch_size: 128
memory_format: nhwc
TF32:
<<: *efficientnet_b4_params_4k
arch: efficientnet-quant-b4
batch_size: 64
# }}}